Tasks, Responsibilites, Roles and Acheivements in Various Companies

Thales-eSecurity, Crawley, Brighton, Long Crendon, Florida
MASS Consultants, Little Paxton, Cambridgeshire
Quonnectis, Twickenham, London
EADs-Astrium, Stevenage, Portsmouth & Toulouse
Cogent-DSN, Newport
EADs-Astrium, Stevenage
BCN Data Systems, Milton Keynes
Baltimore Technologies, Hemel Hempstead
Matra Marconi Space, Stevenage
Aculab, Milton Keynes
BAe Space Systems, Stevenage
Radstone Technologies, Towcester
Plessey Opto & Microwave, Towcester
MOD RAe, Bedford

From Aug 2007 to date: Thales-eSecurity

Title Security Engineer
Assisting with evaluation documentation for various HMG High Grade products and several products for FIPS140-L3 including SCIP/IP/Link.

From Jan 2007: Mass Consultants

Title COMSEC Consultant
Mass provides hardware and software solutions for mainly for defense and government departments. Role: Performing security analysis and security test plans for High Grade Secure Aircrew Radio Control system for Nimrod (RCADS) and advice on other projects.

Part time From Aug 2006 to June 2009: Qonnectis

Title Consultant Engineer
Small company supplying smart remote metering solutions including hardware/software and web access software products. Hardware and software design and development from own office.

From Nov 2004 to date: EADs-Astrium

Title COMSEC Consultant
Crypto bid and preliminary work for a HG Canadian TT&C and Payload data crypto. Security target writing. Crypto definition on Yahsat TT&C crypto. Defining Secure Operation Procedures for Skynet5 ground and space cryptos, Key manipulation, testing and rollout for various Satellite Integration phases at Portsmouth and Interspace Toulouse. Next generation crypto studies including key delivery mechanisms. Support to early Galileo crypto work including Common Criteria documentation.

March to Nov 2004: Cogent DSN

(Now part of EADs)
Title COMSEC Approvals Consultant
Cogent is responsible for supplying a large portion of the ground equipment for Skynet 5 including crypto units.

Role: Working on COMSEC security aspects including performing detailed design analysis and generating primary documentation required by CESG for accreditation of High Grade crypto equipment, general assistance to the design team including requirements flow down in DOORS software, updating design description documents, performing analysis of BIST coverage, producing PCB layout rules and checking the security aspects of the PCB implementations.
Return to list

From April 2003: EADs-Astrium

(Formerly Matra Marconi Space)
Title COMSEC/TRANSEC Approvals Consultant
EADs-Astrium is Equipment Prime for Skynet 5 and responsible for the design of certain crypto units and approval of the ground segment crypto unit for the new MOD Skynet 5 satellites.

Role: advising regards COMSEC security aspects, performing detailed design analysis and generating primary documentation required by CESG for accreditation of High Grade crypto equipment, writing of key handling and distributions policy documents, liaison with CESG and contributing to Skynet system key management work groups.
Return to list

Oct 2001 to April 2003: BCN Data Systems

Title: Development Project Manager
BCN is a venture backed Amey & Bechtel, focused on utility telemetering (AMR). It has licences for low power packet radio technology and has a 50,000 end point pilot scheme running in a city area.

Role: Managing the design, through internal and subcontract resources, from concept to beta trials, of an externally mounted packet radio data collection device (DCD) for volumes of 25K+ and an electric meter transmission device for high volume. The DCD technology receives, processes and forwards meter information and includes an embedded Goode processor running a complex multi threaded Linux application, 2 types of duplex radio circuits, micocontrollers, SMPs and power and battery management circuitry. The low power Transmeter is an NEC microcontroller application with a RF transmitter. The projects draw on resources around the globe for various functions including software development in the US, RF development by Plextek, manufacturers in Italy and Slovenia, mechanics, PCBs, prototyping etc elsewhere. The challenges were the co-ordination of a large number of dispersed skills, gaining consensus across cultures and ways of working, designing for cost and life/durability/service targets, a tight schedule and with very little internal engineering infrastructure.

Achievements: Alpha DCD models deployed in US and UK, to schedule and budget with no major issues.

Tasks: Following the Product Life Cycle methodology, writing requirements, specs, protocols, schedules, budgets, subcontractor monitoring, unit costs, spend profiles, progress reports, presentation to VP management team, holding design reviews and technical direction. Hands on software and prototype debug, PIC S/W approvals liaison.
Return to list

July 1999 to Sept 2001: Baltimore Technologies

(formerly Zergo, now AEP Systems) Title: Engineering Manager (Hardware Products)
The SureWare products group designs and supplies mid volume hardware Encryptors and Authenticator products for high security niche markets such as Government and Financial. The products are mainly stand alone LAN or PCI based and include an embedded processor platform running PSOS with large FPGAs and ASICs for encryption. The challenges are in the design of complex digital and analogue security mechanisms to detect tamper and in providing a contiguous security philosophy through build, commissioning and use.

Role: Managing the design and product life cycle of a new generation of products with an internal team of up to 12 and external niche skills subcontractors. Providing architectural input, checking, assistance with debugging, problem solving and training, gaining accreditation and approvals; EMC, safety and security. Line management, recruitment and building up of the team. Investigating and accomplishing the outsourcing of manufacturing, test and various, strategic and non- core design activities, migrating products from a US company, including travel and liaison.

Achievement: Developed and rolled out the Sureware product range which included a high risk tamper mechanism arrangement. Designed the next generation higher performance crypto platform.
Return to list

June 1995 to June 1999: Matra Marconi Space UK

(Formerly BAe)
Titles: Specialist Engineer, Responsible Engineer, Digital Design Manager
The group is responsible for DSP designs for comms satellites involving large numbers of high gate count ASICs (4000) designed in VHDL, high speed conversion products (100MHz) , RF front and back ends, proprietary DSPs, SPARC processors and state of the art packaging including Multi Chip Modules, Grid Arrays and advanced flexi-rigid microvia PCBs. Development work uses the largest and fastest ALTERA FPGAs.

Roles: Line manager for approx 15 engineers, recruiting appraisals etc. Hands on technical authority, VHDL ASIC design, system, digital, analogue design, microelectronics packaging innovation, specifying, design supervision and checking, supplier interaction, applying and accounting for funds, bid work, internal and external presentations.

Achievement: designed and implemented a Payload Processor Demonstrator which was successfully and extensively used to show feasibility. Personally conceived a new packaging method providing 50%+ reduction in volume and mass, solving many implementation problems and making the processor feasible. The design is now in use for the Inmarsat 4 programme. Wrote the Serial bus ASIC code used in the majority of the thousands of ASICs on the programme.
Return to list

July 1992 - June 1995: Aculab

Title: Senior Design Engineer
At that time a design contract house (mainly for BT) and an ISDN Telecommunication and speech synthesis software and hardware OEM equipment originator (then 30 people).

Role: Hands on hardware and software designer. Personal designs included a PC ISA BR ISDN, PR ISDN, 486 PC with LAN, PSTN card, a 68EC030/56001DSP speech processing card and a 21060 SHARC DSP (6 off) card with extensive use of ALTERA FPGA and AHDL, the writing of layer 1 and test S/W, obtaining EMC and BABT approvals.

Achievement: success of designs as OEM products
Return to list

Jan 1990 - July 1992: BAe Space Systems

Titles: Senior Engineer, Team Leader
Departments - Satellite Digital Systems and Attitude and Orbital Control

Roles : Electronic 'expert' engineer in a study team looking at a Light Satellite design. Team leader on a 'next generation' processor based AOCS equipment design. Wrote a paper and presented it to a NATO Skynet symposium in Den Hague. Detail designs included - serial comms X25 PC card, S/W for serial optical LAN using OS9 & 'C'.
Return to list

1982 - Jan 1990: Radstone Technology Towcester

(formerly Plessey Microsystems)
Business: manufacture of industrial and military VME and MULTIBUS card ranges and turn-key systems.

Roles: Senior & Principle Engineer Team Leader on PMM86 Card design team (2/3), digital/ microprocessor circuit and systems/equipment design. Responsible for around eight production cards including processors (80C86/80286/80386), memory and I/O & test equipment, liaising with customers, on site application debug and assisting into manufacture. Writing of BIST software in PLM86 and the development of test equipment and processes.

Achievement: PMM86 range was still going strong and a significant portion of Radstone's revenue for a good number of years.
Return to list

1977 - 1982: Plessey Opto and Microwave & Plessey Caswell

Manufacturer and developer of GAS 555 opto-electronic and microwave systems, modules and devices.

Roles: Senior Engineer, design of diverse pyro, microwave and optical application circuits and test equipment including transistor, high speed pulse, precision liner, low noise, RF Gunn and Mixer circuits. Software for test equipment in 1802 assembler and Hp Basic.

Achievement: Custom pyro test equipment I designed/developed was running and in use for more than 15 years before being replaced.
Return to list

1972 - 1977: Royal Aircraft Establishment (MOD)

Civil and government research facility. Titles: Professional and Technological Officer (PTO4), Apprentice.

Roles: engaged in digital and analogue circuit design for aircraft simulators. Synchro, video, servo and instrumentation etc. Served an excellent and broad based, four year electronics apprenticeship which included extensive off line electronics training, seven years' day release, and 6 solid months of mechanical training.
Return to list